Xilinx's next-generation UltraScale architecture becomes ASIC or SO...

In recent years, the increase in the scale of ASIC design has brought unprecedented chip prototype verification problems. A single large-capacity FPGA is usually not enough to accommodate tens of millions of gate-level logic designs, or even hundreds of millions of gate-level logic designs. Today, the entire verification design is divided into multiple large-capacity FPGAs using the latest technology. FPGAs are interconnected through a high-speed bus and become an excellent choice for large-scale ASIC or SOC prototype verification.

Chip advantages:

XILINX new generation UltraScale architecture meets large-scale ASIC design needs

Xilinx's next-generation UltraScale architecture becomes an excellent choice for ASIC or SOC prototype verification

FPGA-based simulation and prototyping can quickly and accurately implement SoC system modeling and verification and accelerate the development of software and firmware. With the 20nm solution Virtex UltraScale VU440 FPGA, Xilinx brings prototyping to the stage of millions of logic cell solutions:

Avoid the trouble of multi-chip partitioning in many cases

Reduce the development risk of large ASIC and ASSP designs

Reduced board-level space requirements and complexity

Realize flexible I/O and create adjacent devices

Reduced system-level power consumption

Dini Group introduction:

Dini Group is an international leader in providing large-scale FPGA ASIC verification platforms, high-performance IP and systems. The FPGA verification platform of Dini Group is widely used in ASIC and SOC prototyping, low-latency transactions and high-performance computing. At the Dini headquarters in La Jolla, California, the employees of the Dini Group have provided more than 1.2 billion ASIC gates to the world.

Solution | Dini Group provides a very large-scale ASIC prototype verification platform based on Xilinx's latest UltraScale architecture-DNVUF4A

Xilinx's next-generation UltraScale architecture becomes an excellent choice for ASIC or SOC prototype verification

DNVUF4A

Platform Introduction:

DNVUF4A is a complete prototype verification system that provides large-capacity, flexible and expandable prototype logic and memory design carriers for ASIC and IP designers. DNVUF4A is equipped with four Virtex UltraScale VU440, which can provide designers with 116 million ASIC gate technology standard measurement gates. As an independent system, DNVUF4A can communicate with the host via 4-lane PCIe cable (GEN3), USB or Ethernet. Multiple DNVUF4A can be cascaded to achieve seamless connection of more than 1 billion doors. 100% of the Virtex UltraScale FPGA resources of this platform are available for user application requirements. DNVUF4A uses Xilinx 16nm Virtex UltraScale series FPGA technology to achieve high gate density and support the fastest target clock frequency application.

Xilinx's next-generation UltraScale architecture becomes an excellent choice for ASIC or SOC prototype verification

DNVUF4A system block diagram

Support multi-board stacking system: VIRTEX-ULTRASCALE GENERATION

Xilinx's next-generation UltraScale architecture becomes an excellent choice for ASIC or SOC prototype verification

content

Xilinx's next-generation UltraScale architecture becomes an excellent choice for ASIC or SOC prototype verification

Multi-board stacking diagram

Main business of Dini Group

No matter what engineering problems your design encounters on hardware, our FPGA platform can provide faster speed and better solve engineering problems than any other FPGA platform on the market. Whether it is high-performance computing, low-latency transactions, multi-core large-scale FPGA prototypes, SoC prototypes, telecom analysis, ASIC prototype development, code verification, cloud computing, video and audio compression and filtering, algorithm acceleration-our platform can do all of these problem.

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