![<?echo $_SERVER['SERVER_NAME'];?>](/template/twentyseventeen/skin/images/header.jpg)
With the continuous development of the communication industry, mobile terminals have evolved from a single call function to voice, data, image, music and multimedia.
This article refers to the address: http://
For mobile terminals, there are basically two types: one is a feature phone; the other is a smart phone. Smartphones have the basic functions of traditional mobile phones and have the following features: open operating system, hardware and software scalability and support for secondary development by third parties. Compared with traditional mobile phones, smart phones are increasingly favored by people because of their powerful functions and convenient operation, and will gradually become a trend in the market.
However, as a portable and mobile terminal, it relies entirely on the battery to supply power. As the function of the smart phone becomes more and more powerful, its power loss is also increasing. Therefore, it is necessary to increase the usage time and standby time of the smartphone. There are two solutions to this problem: one is to use a larger capacity mobile phone battery; the other is to improve the system design, using advanced technology to reduce the power loss of the mobile phone.
At this stage, the battery equipped with mobile phones is mainly lithium-ion batteries. Although the energy density of lithium-ion batteries has increased by nearly 30% compared with the past, it still cannot meet the development needs of smartphones. As far as the lithium ion battery materials currently in use are concerned, the energy density is only about 20% of the lifting space. Another fuel cell that is widely regarded as the future development trend of mobile phone batteries in the industry can make the talk time of smartphones exceed 13 hours and the standby time is up to 1 month. However, this battery technology is still immature, and it is still commercial. For a while [1]. Increasing the overall trend of mobile phone battery capacity will increase the cost of the whole machine.
Therefore, starting from the overall design of the smartphone, advanced technology and devices are applied to design a solution that reduces power loss, thereby maximizing the use time and standby time of the smartphone. In fact, low-power design has become an increasingly pressing issue in smartphone design.
1 Smartphone hardware system architecture
The hardware architecture of the smartphone discussed in this article uses a dual cpu architecture, as shown in Figure 1.
The main processor runs an open operating system and is responsible for the control of the entire system. The dbb (digital baseband chip) from the processor to the wireless modem part mainly performs a/d conversion of voice signals, d/a conversion, encoding and decoding of digital voice signals, channel codec and timing control of the wireless modem part. The master and slave processors communicate through the serial port. The main processor uses the xxx company's cpu chip, which uses the cmos process, has the arm926ej-s core, uses arm's amba (advanced microcontroller bus architecture), contains 16 kb instruction cache, 16 kb data cache inside. And mmu (memory management unit). In order to implement real-time video conferencing, an optimized mpeg4 hardware codec is carried. It can perform hardware processing on large-quantity mpeg4 codec and speech compression decompression, thus alleviating the computational pressure of the arm kernel. The main processor includes an LCD (liquid crystal display) controller, a camera controller, sdram and srom controllers, many common gpio ports, and sd card interfaces. These make it an excellent application in the design of smartphones.
In the hardware architecture of the smart phone, the wireless modem part only needs to add certain peripheral circuits, such as audio chip, lcd, camera controller, microphone, speaker, power amplifier, antenna, etc., which is a complete ordinary mobile phone (traditional mobile phone). Hardware circuit. The analog baseband (abb) voice signal pin communicates with the audio codec chip to form a voice channel during the call.
From the system architecture of this hardware circuit, the most power-consuming part includes the main processor, wireless modem, LCD and keyboard backlight, audio codec and power amplifier. Therefore, how to reduce their power consumption in design is an important issue.
2 low power design
2.1 Reduce the supply voltage and frequency of the cpu part
In the design of digital integrated circuits, the static power consumption of the CMOS circuit is very low, which is basically negligible compared with its dynamic power consumption, so it is not considered. Its dynamic power calculation formula is:
Pd="ctv2f" (1)
Where: pd is the dynamic power consumption of the CMOS chip; ct is the load capacitance of the CMOS chip; v is the working voltage of the CMOS chip; f is the operating frequency of the CMOS chip.
It can be known from equation (1) that the power consumption in the CMOS circuit is linear with the switching frequency of the circuit and has a quadratic relationship with the supply voltage. For cpu, the higher the vcore voltage, the faster the clock frequency, the greater the power consumption. Therefore, under the premise of being able to normally satisfy the system performance, the CPU with low voltage operation should be selected as much as possible. For the selected cpu, reducing the supply voltage and operating frequency can achieve better results in overall power consumption.
For the main CPU, the core supply voltage is 1.3 v, which is already very small, and the main frequency of the full-speed operation can be set as needed. The other various frequencies required internally are generated by the main frequency division. The main cpu frequency fcpu calculation formula is as follows:
On the coms chip, in order to prevent damage caused by static electricity, unused pins cannot be left floating. Generally, pull-down resistors are used to reduce the input impedance and provide a discharge path. A pull-up resistor is needed to increase the output level, thereby increasing the noise margin of the chip input signal to enhance the anti-jamming capability. But when choosing a pull-up resistor,
The following points must be considered:
a) Considering the power consumption and the chip's current sinking capacity, the pull-up resistor should be large enough to reduce the current;
b) From the perspective of ensuring sufficient drive current, the pull-up resistor should be small enough to increase the current;
c) In high-speed circuits, excessive pull-up resistors can flatten the edges of the signal and deteriorate signal integrity.
Therefore, in consideration of the ability to drive the latter stage normally (ie, considering the chip's vih or vil), a larger resistance value is selected as much as possible to save power consumption of the system. For pull-down resistors, the situation is similar.
2.3.2 Processing of Floating Pins
For the floating pins of the CMOS device in the system, attention must be paid. Because the input impedance of the CMOS floating input is extremely high, it is likely to induce some charge to cause the device to be broken down by high voltage, and it will cause the signal level of the input to change randomly, causing the CPU to wake up continuously during sleep, and thus cannot enter the sleep state. Or other inexplicable failures. So the correct way is to keep the unused input connected to the corresponding supply voltage to maintain a high level or to keep it low by grounding, depending on the initial state of the pin.
2.3.3 Buffer selection
Buffers have many functions, such as level shifting, increased drive capability, direction control of data transmission, etc. When adding buffers based solely on drive capability considerations, care must be taken that more energy is wasted due to excessive drive currents. Drop it. Therefore, you should carefully check whether the maximum output current of the chip, ioh and iol, is sufficient to drive the lower level chip. When selecting the appropriate front and rear stage chips, the buffer should be avoided as much as possible.
2.4 power supply circuit
Due to the dual cpu architecture, there are many peripherals and many different power supplies are required. In the case of the main CPU alone, 1.3v, 2.4v, and 2.8v voltages are required, so many voltage change units are required. Generally, there are several voltage conversion methods: linear regulator; dc/dc; LDO (low drop regulator). Among them, ldo is essentially a linear regulator, mainly used in the case of small voltage difference, so it is combined into a linear regulator.
Linear regulators are characterized by simple circuit structure, low component count, and large input and output voltage differences, but their Achilles heel is low efficiency and high power consumption. The efficiency η depends entirely on the output voltage.
The dc/dc circuit is characterized by high efficiency and flexible buck-boost. The disadvantage is that the circuit is relatively complicated, the ripple noise is relatively large, the volume is relatively large, and the price is higher than the linear voltage regulator. For boosting, only dc can be used. /dc. Therefore, in the design, for the case where the power supply ripple noise is not strict, the dc/dc voltage conversion device is used, which can effectively save energy and reduce the power consumption of the smart phone.
Gas Light,Outside Gas Light,Camping Light
Stainless Steel Gas Hob,Tempered Glass Gas Hob Co., Ltd. , http://www.nsgasstove.com